[PEDA] First BGA design with blind-buried vias.

[Brian Guralnick]

Richard, thanks for the recomendations.  I guess I will work with the 
standard 10 mil hole via size as well.

____________
Brian G.


----- Original Message ----- 
From: "Richard Sumner" <rls at rsumner.com>
To: "Protel EDA Discussion List" <PEDA at techservinc.com>
Sent: Wednesday, June 21, 2006 6:59 PM
Subject: Re: [PEDA] First BGA design with blind-buried vias.


> Brian,
>
> As I said, my board is old technology, except for the bga. I used 6
> layers, top, bottom and one internal wiring, one ground (not split)
> and 2 power planes, split to handle my 7 different power sources
> (fpga took 3 by itself!). And only ordinary thru vias, 10 mil
> finished, not tented. 30 ga ww wire fits in a 10 mil hole (not every
> board us perfect on the first rev), and the vias make nice test
> points. I did bring several unused fpga pins out to vias, to use as
> test points to probe inside the fpga (you have to compile what you
> want it to show, but the change, compile, reload and test cycle can
> be as short as 10 minutes).
>
> Richard
>
>
> At 05:50 PM 6/21/2006, you wrote:
>>Richard, you basically hit the strategy I was working toward.
>>
>>I guess my question would bettee be how to configure the signal layer 
>>pairs
>>in 99se & any other size/optimal settings regrading blind/buried vias.
>>
>>____________
>>Brian G.
>>
>>
>>
>>----- Original Message -----
>>From: "Richard Sumner" <rls at rsumner.com>
>>To: "Protel EDA Discussion List" <PEDA at techservinc.com>
>>Sent: Wednesday, June 21, 2006 5:08 PM
>>Subject: Re: [PEDA] First BGA design with blind-buried vias.
>>
>>
>> > Brian,
>> >
>> > I'm currently debugging a 6 layer board with a 676 pin bga. I
>> > actually needed only 316 of the i/o pins, and I simply avoided the
>> > deep rows of the bga. With only 1 trace between bga pads, I can get
>> > the first two rows (counting from the outside in) on the top layer,
>> > and using thru vias I can get the next two rows (equivalent, you have
>> > to avoid blocking the planes with adjacent clearance around the vias)
>> > on the bottom (or any other layer). This is a low volume product, not
>> > very (parts) cost sensitive, so I can justify the larger package
>> > (It's actually a trade off with a more expensive board). It was my
>> > first board with ad2004, and I did make use of the fpga pin swapping
>> > (much easier than with 99se, but still not simple)
>> >
>> > Richard
>> >
>> >
>> > At 04:14 PM 6/21/2006, you wrote:
>> >>Ok, I'm still using P99SE.
>> >>
>> >>     I need to upgrade an existing project with the main IC being a 240
>> >> QFP,
>> >>going to an Altera 484 pin, 1mm fineline BGA, however, there are some
>> >>parts
>> >>under the chip.
>> >>
>> >>     My PCB is only 6 layers.  I've never done blind/buried vias before 
>> >> in
>> >>protel.  How should I configure protel to handle the blind-buried vias
>> >>under
>> >>the BGA pads.  Am I attempting something that shouldn't be done?  Can 
>> >>some
>> >>BGA pads just be pads with no holes at all without upsetting the 
>> >>mounting?
>> >>Is there any good reason to switch to microvias?
>> >>
>> >>
>> >>____________
>> >>Brian G.
>> >>
>> >>
>> >>
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> Cheesecote Mountain CAMAC,  24 Halley Drive; Pomona, NY 10970
> voice: 845 364 0211, NEW fax: 877-840-0023, Skype: cmcamac, 
> www.cmcamac.com
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